WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
THE ROLE:
As a member of the Graphics Technologies and Engineering (G&E) Methodology and Technology team, you will develop and improve design flows bringing to life cutting-edge designs in latest technologies. You will work closely with the Block level Physical Design, Full Chip Floorplan / Netlist, Full Chip Static Timing Analysis, CAD, Methodology and Technology Teams to achieve first pass silicon success.
KEY RESPONSIBLITIES:
Physical design and timing methodology development on a particular nodes and SOCs
Automation to improve design PPA (Power, Performance, Area) and ensure a high-quality design environment for an SOC
Full chip / sub-system/ Tile level timing analysis with bleeding edge STA methodologies
Full chip / sub system level Clock tree synthesis and advanced clock tree construction and analysis.
Understand design requirements, timelines and various milestones of a project
Block and top level Formal verification, Signoff
Top level ECO strategy for RTL, pre-physical and post-route implementation considering timing, congestion, IRdrop and logic equivalence
Statistical and Static Timing Analysis, Variation aware analysis, stdcell Library characterization enhancements
Developing and Integrating ML and LLM applications for Physical Design and Analysis flows
Collaborate with CAD and EDA vendors to further strengthen AMD timing closure
Performing data analysis and identifying design trends
Customizing and implementing solutions for new challenges
Collaborating with multi-site engineering teams to reach project goals
Hands-on in reference flows, excellent debugging skills.
Maintain and update technology collaterals
PREFERRED EXPERIENCE:
Experience in ASIC Physical Design and/or CAD development with industry experience in STA, constraints, timing signoff and physical design
Hands-on experience with Place and Route, Timing Analysis, and Physical Verification tools from Synopsys, Cadence, like ICC2, Fusion Compiler, Innovus, Primetime, Primeshield, PT-PX, Formality, Conformal, RedHawk, etc.
Experience in 5nm and below technologies
Experience with Python and Perl.
Knowledge and Experience in ML and LLM
Experience with data analytics applications, database management
Experience with Verilog RTL design/implementation and has experience of large digital ASIC project.
Experience with physical design is a plus.
Has Synthesis or physical implement experience.
Experience with lower power design methodology.
Good English skills on talking, presentation and writing documents.
Good communication and strong sense of responsibility, task scheduling, and time management.
LOCATION:
Santa Clara, California
#LI-PA1
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.